Electronic parts and printed wiring boards in which wiring patterns are formed on insulating layers and the wiring patterns are stacked along their thickness direction to form a multilayer structure have been known.
Various methods for manufacturing such structures have been proposed or disclosed. FIGS. 3A and 3B are process diagrams illustrating a conventional process of producing each layer of an electronic part.
In the process shown in FIG. 3A, the surface of an insulating layer 1 is irradiated with a laser so as to be perforated. After a hole 2 is formed by the laser processing, the hole 2 is filled with paste, or a conductor portion in the form of a film or a column is formed in the hole 2.
In the process shown in FIG. 3B, a conductor portion 4 is formed by plating or etching on an insulating layer 3, which has been formed in advance. After the conductor portion 4 is formed by the above processes, an insulating resin 5 is applied on the surface of the conductor portion 4 by spin coating (see, for example, patent document 1).
In a different known method, a bump of an electrically conductive paste is formed on wiring on a board, then an interlaminate connection insulating material and a metal layer are provided, and the bump is caused to penetrate a molded resin by a pressing process to achieve electrical connection between said bump and the metal layer (see, for example, patent document 2).
Furthermore, a method of forming a via hole conductor by forming a through hole by means of a carbon dioxide gas laser or other means and filing the through hole with paste containing powder of a low resistance metal such as gold, silver, copper and aluminum has also been disclosed (see, for example, patent document 3).                Patent Document 1: Japanese Patent Application Laid-Open No. 10-22636.        Patent Document 2: Japanese Patent Application Laid-Open No. 2002-137328.        Patent Document 3: Japanese Patent Application Laid-Open No. 2002-134881.        
In connection with electronic parts having a multilayer structure, incorporation of an element etc. in the interior of the electronic part has been considered in order to further increase density and functions. If an element such as a passive component is to be formed between wiring patterns stacked along the lamination direction, the distance between the aforementioned wiring patterns is an important factor that determines characteristics of the aforementioned element. Accordingly, from the viewpoint of stabilization of the element characteristics, a method for manufacturing an electronic part that enables reliable control of the distance between the aforementioned wiring patterns or the thickness of each layer in the aforementioned electronic part has been demanded.
Nevertheless, in the above-mentioned manufacturing method shown in FIG. 3A, a conductor portion is simply formed in a hole 2 formed on an insulating layer 1 by a laser processing, but the overall thickness of the layers is not controlled.
In the manufacturing method shown in FIG. 3B, an insulating resin layer is formed to cover conductor portions by applying resin by spin coating. However, undulation is created on the surface of the insulating resin due to presence of the conductor portions 4, and therefore it is difficult to make the overall thickness of the layers uniform.
Furthermore, in the method in which a bump of electrically conductive paste is formed on wiring on a board and then the bump is caused to penetrate a molded resin by pressing, no consideration has been made on control of the overall thickness of the layers. Still further, Japanese Patent Application Laid-Open No. 2002-134881 only teaches to form a via hole conductor by filling paste, but no consideration is made on control of the overall thickness of the layers.